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philips semiconductors product specification powermos transistor BUK101-50GS topfet description quick reference data monolithic temperature and symbol parameter max. unit overload protected power mosfet in a 3 pin plastic envelope, intended v ds continuous drain source voltage 50 v as a general purpose switch for i d continuous drain current 29 a automotive systems and other p d total power dissipation 75 w applications. t j continuous junction temperature 150 ?c r ds(on) drain-source on-state resistance 50 m w applications v is = 10 v general controller for driving lamps motors solenoids heaters features functional block diagram vertical power dmos output stage low on-state resistance overload protection against over temperature overload protection against short circuit load latched overload protection reset by input 10 v input level low threshold voltage also allows 5 v control control of power mosfet and supply of overload protection circuits derived from input esd protection on input pin overvoltage clamping for turn off of inductive loads fig.1. elements of the topfet. pinning - to220ab pin configuration symbol pin description 1 input 2 drain 3 source tab drain power mosfet drain source input o/v clamp logic and protection rig 123 tab p d s i topfet january 1993 1 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet limiting values limiting values in accordance with the absolute maximum rating system (iec 134) symbol parameter conditions min. max. unit v dss continuous off-state drain source v is = 0 v - 50 v voltage 1 v is continuous input voltage - 0 11 v i d continuous drain current t mb 25 ?c; v is = 10 v - 29 a i d continuous drain current t mb 100 ?c; v is = 10 v - 18 a i drm repetitive peak on-state drain current t mb 25 ?c; v is = 10 v - 120 a p d total power dissipation t mb 25 ?c - 75 w t stg storage temperature - -55 150 ?c t j continuous junction temperature 2 normal operation - 150 ?c t sold lead temperature during soldering - 250 ?c overload protection limiting values with the protection supply provided via the input pin, topfet can protect itself from two types of overload. symbol parameter conditions min. max. unit v isp protection supply voltage 3 for valid protection 5 - v over temperature protection v ddp(t) protected drain source supply voltage v is = 10 v - 50 v short circuit load protection v ddp(p) protected drain source supply voltage 4 v is = 10 v - 20 v v is = 5 v - 35 v p dsm instantaneous overload dissipation t mb = 25 ?c - 1.3 kw overvoltage clamping limiting values at a drain source voltage above 50 v the power mosfet is actively turned on to clamp overvoltage transients. symbol parameter conditions min. max. unit i drom repetitive peak clamping current v is = 0 v - 29 a e dsm non-repetitive clamping energy t mb 25 ?c; i dm = 27 a; - 625 mj v dd 20 v; inductive load e drm repetitive clamping energy t mb 95 ?c; i dm = 8 a; - 40 mj v dd 20 v; f = 250 hz esd limiting value symbol parameter conditions min. max. unit v c electrostatic discharge capacitor human body model; - 2 kv voltage c = 250 pf; r = 1.5 k w 1 prior to the onset of overvoltage clamping. for voltages above this value, safe operation is limited by the overvoltage clampi ng energy. 2 a higher t j is allowed as an overload condition but at the threshold t j(to) the over temperature trip operates to protect the switch. 3 the input voltage for which the overload protection circuits are functional. 4 the device is able to self-protect against a short circuit load providing the drain-source supply voltage does not exceed v ddp(p) maximum. for further information, refer to overload protection characteristics. january 1993 2 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet thermal characteristics symbol parameter conditions min. typ. max. unit thermal resistance r th j-mb junction to mounting base - - 1.3 1.67 k/w r th j-a junction to ambient in free air - 60 - k/w static characteristics t mb = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit v (cl)dss drain-source clamping voltage v is = 0 v; i d = 10 ma 50 - - v v (cl)dss drain-source clamping voltage v is = 0 v; i dm = 2 a; t p 300 m s; - - 70 v d 0.01 i dss zero input voltage drain current v ds = 12 v; v is = 0 v - 0.5 10 m a i dss zero input voltage drain current v ds = 50 v; v is = 0 v - 1 20 m a i dss zero input voltage drain current v ds = 40 v; v is = 0 v; t j = 125 ?c - 10 100 m a r ds(on) drain-source on-state i dm = 13 a; v is = 10 v - 35 50 m w resistance t p 300 m s; d 0.01 v is = 5 v - 45 60 m w overload protection characteristics topfet switches off when one of the overload thresholds is reached. it remains latched off until reset by the input. symbol parameter conditions min. typ. max. unit short circuit load protection 1 t mb = 25 ?c; l 10 m h e ds(to) overload threshold energy v dd = 13 v; v is = 10 v - 0.4 - j t d sc response time v dd = 13 v; v is = 10 v - 0.8 - ms over temperature protection t j(to) threshold junction temperature v is = 10 v; from i d 3 1 a 2 150 - - ?c input characteristics t mb = 25 ?c unless otherwise specified. the supply for the logic and overload protection is taken from the input. symbol parameter conditions min. typ. max. unit v is(to) input threshold voltage v ds = 5 v; i d = 1 ma 1.0 1.5 2.0 v i is input supply current v is = 10 v; normal operation - 0.4 1.0 ma v isr protection reset voltage 3 2.0 2.6 3.5 v v isr protection reset voltage t j = 150 ?c 1.0 - - i isl input supply current v is = 10 v; protection latched 1.0 2.5 4.0 ma v (br)is input clamp voltage i i = 10 ma 11 13 - v r ig input series resistance to gate of power mosfet - 4 - k w 1 the short circuit load protection is able to save the device providing the instantaneous on-state dissipation is less than the limiting value for p dsm , which is always the case when v ds is less than v dsp maximum. refer to overload protection limiting values. 2 the over temperature protection feature requires a minimum on-state drain source voltage for correct operation. the specified minimum i d ensures this condition. 3 the input voltage below which the overload protection circuits will be reset. january 1993 3 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet transfer characteristics t mb = 25 ?c symbol parameter conditions min. typ. max. unit g fs forward transconductance v ds = 10 v; i dm = 13 a t p 300 m s; 10 16 - s d 0.01 i d(sc) drain current 1 v ds = 13 v; v is = 10 v - 80 - a switching characteristics t mb = 25 ?c. r i = 50 w . refer to waveform figures and test circuits. symbol parameter conditions min. typ. max. unit t d on turn-on delay time v dd = 13 v; v is = 10 v - 1.5 - m s t r rise time resistive load r l = 2.1 w -6- m s t d off turn-off delay time v dd = 13 v; v is = 0 v - 18 - m s t f fall time resistive load r l = 2.1 w -9- m s t d on turn-on delay time v dd = 10 v; v is = 10 v - 2 - m s t r rise time inductive load i dm = 6 a - 1 - m s t d off turn-off delay time v dd = 10 v; v is = 0 v - 22 - m s t f fall time inductive load i dm = 6 a - 1 - m s reverse diode limiting value symbol parameter conditions min. max. unit i s continuous forward current t mb 25 ?c; v is = 0 v - 29 a reverse diode characteristics t mb = 25 ?c symbol parameter conditions min. typ. max. unit v sds forward voltage i s = 29 a; v is = 0 v; t p = 300 m s - 1.0 1.5 v t rr reverse recovery time not applicable 2 ---- envelope characteristics symbol parameter conditions min. typ. max. unit l d internal drain inductance measured from contact screw on - 3.5 - nh tab to centre of die l d internal drain inductance measured from drain lead 6 mm - 4.5 - nh from package to centre of die l s internal source inductance measured from source lead 6 mm - 7.5 - nh from package to source bond pad 1 during overload before short circuit load protection operates. 2 the reverse diode of this type is not intended for applications requiring fast reverse recovery. january 1993 4 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet fig.2. normalised limiting power dissipation. p d % = 100 p d /p d (25 ?c) = f(t mb ) fig.3. normalised continuous drain current. i d % = 100 i d /i d (25 ?c) = f(t mb ); conditions: v is = 5 v fig.4. safe operating area. t mb = 25 ?c i d & i dm = f(v ds ); i dm single pulse; parameter t p fig.5. transient thermal impedance. z th j-mb = f(t); parameter d = t p /t fig.6. typical output characteristics, t j = 25 ?c. id = f(v ds ); parameter v is ; t p = 250 m s & t p < t d sc fig.7. typical on-state characteristics, t j = 25 ?c. id = f(v ds ); parameter v is ; t p = 250 m s 0 20 40 60 80 100 120 140 tmb / c pd% normalised power derating 120 110 100 90 80 70 60 50 40 30 20 10 0 1e-07 1e-05 1e-03 1e-01 1e+01 t / s zth / (k/w) 10 1 0.1 0.01 0 0.5 0.2 0.1 0.05 0.02 BUK101-50GS d = d = t p t p t t p t d 0 20 40 60 80 100 120 140 tmb / c id% normalised current derating 120 110 100 90 80 70 60 50 40 30 20 10 0 0 4 8 12 16 20 24 28 32 BUK101-50GS vds / v id / a 100 50 0 9 11 10 8 7 6 5 4 3 2 vis / v 1 100 vds / v 1000 100 10 1 BUK101-50GS 10 id & idm / a overload protection characteristics not shown dc 100 us 1 ms 10 ms 100 ms 10 us tp = rds(on) = vds/id 0 2 4 BUK101-50GS vds / v id / a 100 90 80 70 60 50 40 30 20 10 0 vis = 10 v 6 v 8 v 4 v 135 january 1993 5 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet fig.8. typical on-state resistance, t j = 25 ?c. r ds(on) = f(i d ); parameter v is ; t p = 250 m s fig.9. typical transfer characteristics, t j = 25 ?c. i d = f(v is ) ; conditions: v ds = 10 v; t p = 250 m s fig.10. typical transconductance, t j = 25 ?c. g fs = f(i d ); conditions: v ds = 10 v; t p = 250 m s fig.11. normalised drain-source on-state resistance. a = r ds(on) /r ds(on) 25 ?c = f(t j ); i d = 13 a; v is = 10 v fig.12. typical overload protection characteristics. t d sc = f(p ds ); conditions: v is 3 5 v; t j = 25 ?c. fig.13. normalised limiting overload dissipation. p dsm % =100 p dsm /p dsm (25 ?c) = f(t mb ) 0 20 40 60 80 100 BUK101-50GS id / a rds(on) / mohm 100 50 0 vis / v = 4 5 6 7 8 9 10 11 -60 -40 -20 0 20 40 60 80 100 120 140 tj / c a normalised rds(on) = f(tj) 1.5 1.0 0.5 0 0 2 4 6 8 10 12 BUK101-50GS vis / v id / a 100 50 0 0.1 1 10 pds / kw td sc / ms BUK101-50GS 100 10 1 0.1 pdsm 0 20 40 60 80 100 BUK101-50GS id / a gfs / s 20 15 10 5 0 -60 -40 -20 0 20 40 60 80 100 120 140 tmb / c pdsm% 120 100 80 60 40 20 0 january 1993 6 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet fig.14. typical overload protection characteristics. conditions: v dd = 13 v; v is = 10 v; sc load = 30 m w fig.15. typical clamping characteristics, 25 ?c. i d = f(v ds ); conditions: v is = 0 v; t p 50 m s fig.16. input threshold voltage. v is(to) = f(t j ); conditions: i d = 1 ma; v ds = 5 v fig.17. typical dc input characteristics, t j = 25 ?c. i is = f(v is ); normal operation fig.18. typical dc input characteristics, t j = 25 ?c. i isl = f(v is ); overload protection operated t i d = 0 a fig.19. typical reverse diode current, t j = 25 ?c. i s = f(v sds ); conditions: v is = 0 v; t p = 250 m s -60 -20 20 60 100 140 180 220 tmb / c BUK101-50GS 1 0.5 0 energy / j time / ms tj(to) energy & time 0 2 4 6 8 10 12 14 BUK101-50GS vis / v ii / ma 1.0 0.5 0 50 60 70 vis / v id / a BUK101-50GS 30 20 10 0 typ. 0 2 4 6 8 10 12 14 vis / v iis / ma BUK101-50GS 5 4 3 2 1 0 protection latched normal reset -60 -40 -20 0 20 40 60 80 100 120 140 tj / c vis(to) / v 2 1 0 max. typ. min. 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 vsd / v is / a BUK101-50GS 120 100 80 60 40 20 0 january 1993 7 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet fig.20. test circuit for resistive load switching times. fig.21. typical switching waveforms, resistive load. v dd = 13 v; r l = 2.1 w ; r i = 50 w , t j = 25 ?c. fig.22. typical switching waveforms, resistive load. v dd = 13 v; r l = 2.1 w ; r i = 50 w , t j = 25 ?c. fig.23. test circuit for inductive load switching times. fig.24. typical switching waveforms, inductive load. v dd = 10 v; i d = 6 a; r i = 50 w , t j = 25 ?c. fig.25. typical switching waveforms, inductive load. v dd = 10 v; i d = 6 a; r i = 50 w , t j = 25 ?c. vdd d.u.t. r 0v 0r1 i vis id measure d s i topfet p rl : adjust for correct id vdd = vcl ld d.u.t. r 0v t p 0r1 i vis id measure d s i topfet p 0 10 20 resistive turn-on time / us BUK101-50GS 10 5 0 vds / v vis / v id / a 10% 10% td on 90% tr 0 10 20 inductive turn-on time / us BUK101-50GS 10 5 0 vis / v vds / v id / a td on 90% 10% 10% tr 0 20 40 resistive turn-off time / us BUK101-50GS 10 5 0 50 30 10 vds / v vis / v id / a 90% 90% 10% td off tf 0 20 40 inductive turn-off time / us BUK101-50GS 10 5 0 10 30 50 vis / v vds / v id / a 90% 10% 90% td off tf january 1993 8 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet fig.26. normalised limiting clamping energy. e dsm % = f(t mb ); conditions: i d = 27 a; v is = 10 v fig.27. clamping energy test circuit, r is = 50 w . fig.28. typical off-state leakage current. i dss = f(t j ); conditions: v ds = 40 v; i is = 0 v. fig.29. normalised input current (normal operation). i is /i is 25 ?c = f(t j ); v is = 10 v fig.30. normalised input current (protection latched). i isl /i isl 25 ?c = f(t j ); v is = 10 v fig.31. maximum drain source supply voltage for sc load protection. v ddp(p) = f(v is ); t mb 150 ?c 0 20 40 60 80 100 120 140 tmb / c edsm% 120 110 100 90 80 70 60 50 40 30 20 10 0 -60 -20 20 60 100 140 180 tj / c iiso normalised to 25 c 1.5 1 0.5 -60 -20 20 60 100 140 180 tj / c iisl normalised to 25 c 1.5 1 0.5 l d.u.t. vdd ris r 01 vds -id/100 + - shunt vis 0 p d s i topfet id 0 vds 0 vdd v(cl)dss schottky e dsm = 0.5 li d 2 v ( cl ) dss /( v ( cl ) dss - v dd ) 0 20 40 60 80 100 120 140 tj / c idss 1 ma 100 ua 10 ua 1 ua 100 na typ. 0 2 4 6 8 10 vis / v vddp(p) / v BUK101-50GS 50 40 30 20 10 0 max january 1993 9 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet mechanical data dimensions in mm net mass: 2 g fig.32. to220ab; pin 2 connected to mounting base. notes 1. refer to mounting instructions for to220 envelopes. 2. epoxy meets ul94 v0 at 1/8". 10,3 max 3,7 2,8 3,0 3,0 max not tinned 1,3 max (2x) 123 2,4 0,6 4,5 max 5,9 min 15,8 max 1,3 2,54 2,54 0,9 max (3x) 13,5 min january 1993 10 rev 1.200
philips semiconductors product specification powermos transistor BUK101-50GS topfet definitions data sheet status objective specification this data sheet contains target or goal specifications for product development. preliminary specification this data sheet contains preliminary data; supplementary data may be published later. product specification this data sheet contains final product specifications. limiting values limiting values are given in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of this specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the specification. philips electronics n.v. 1996 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. life support applications these products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. january 1993 11 rev 1.200

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